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ASIC Engineer Co-op (Sept 2026, 4 Months)
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Layout Design Co-op (Winter 2026)
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Software Developer – WaveLogic Test Platform
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Digital Senior Design Engineer
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Ciena Interconnects Is Hiring: Senior Director, Product Line Management
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Digital Design Engineer – Digital Synchronization
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Ciena Digital Verification Engineer Role
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Senior Verification Engineer - Ciena’s Wavelogic Team
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New Grad: Research Scientist Engineer
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Wavelogic 6 WIP Coordinator
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Mixed Signal Design Engineer
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Digital Design Engineer – Digital Synchronization
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Ciena Interconnects Is Hiring: Senior Director, Product Line Management
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Digital ASIC Engineer with Ciena
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Digital Verification Engineer Position at Ciena
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RF Design Engineer at Ciena
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Senior Analog RF Design Engineer
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Senior Manager, Solution Engineering and Introduction
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Senior ASIC Engineer - Ciena High-Speed Tech
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ASIC Engineer Co-op (Sept 2026, 4 Months)
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Digital Senior Verification Engineer
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Digital Senior Verification Engineer
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Expert Digital Design Engineer at Ciena
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Software Development Co-op Opportunity at Ciena
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Ciena Co-op in Embedded Software Development
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Digital Verification Engineer Prime (FEC)
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Senior ASIC Synthesis and STA Engineer
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Senior ASIC Synthesis and STA Engineer
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ASIC Digital Backend Physical Implementation Engineer
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Software Developer – WaveLogic Test Platform
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New Grad: Digital Verification Engineer (DAC/ADC DSP Correction)
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Principal Analog Layout Engineer
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Software Engineer for WaveLogic Test Platform
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Digital Senior Design Engineer
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Wavelogic Modem HW Engineering Co-op (Fall 2026 - 4 month)
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Digital Design Engineer – Digital Synchronization
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Senior Analog Design Engineer
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Wavelogic Hardware Engineer - New Grad
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Layout Design Co-op (Winter 2026)
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WaveLogic Embedded Software Developer - New Grad
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Embedded Software Engineer - WaveLogic (New Grad)
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New Grad: Digital Verification Engineer (DAC/ADC DSP Correction)
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Mixed Signal Design Engineer
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Senior Digital Design Engineer at Ciena
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Senior ASIC Design Engineer at Ciena
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Ciena Senior Verification Engineer - Digital Focus
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Ciena Digital Verification Engineer Role
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