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ASIC Design Engineer, BOOT, Functional Safety and Power Management
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Principal CAD / AI Methodology Lead, ASIC Infrastructure Development
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STA Lead
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Senior Circuit Design Engineer - SRAM
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Senior Manager, VLSI Design Engineering ( IO Design (LVCMOS, HVCMOS, DDR, LVDS)) with 15+ Years of experience
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Sr. Principal Design Engineer
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Architect MTS
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CAD Design Engineer
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Staff Engineer, HIG HBM Layout
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PCIe Verification Engineer
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Staff Engineer, Design Enablement
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Field Delivery Manager - Beaconsfield Depot
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Sr Principal Design Engineer
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Lead Support Application Engineer - GCS
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Principal DFT Engineer
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Senior Engineer – RV (EM/IR)
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Sr.Lead Engineer - FPGA
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