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CPU ASIC Design Engineer
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Senior EDA Engineer – CMOS ASICs for Quantum Silicon Equity
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ASIC Design Engineer
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Principal EDA Engineer
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Senior Digital ASIC Design Engineer
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Software Engineering Manager - Container and Virtualisation Infrastructure
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Senior IC Layout Engineer – London
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Senior Analog IC Layout Engineer – Hybrid, Quantum CMOS
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Engineering Manager- Ceph & Distributed Storage
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Senior RF IC Design Engineer
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Director, Silicon Product Engineering & Validation
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Principal AI & Compute Engineer, Workforce Development
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Senior Digital ASIC Design Engineer — Shape Next‑Gen Silicon
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Locum Consultant in Emergency Medicine (10PA)
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Founding CTO / AI Engineer
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Digital Design Verification Engineer
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Principal Real Time Interconnect Architect
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Principal Software Architect
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Senior Digital Verification Engineer – High-Speed AI HW
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Device Lifecycle Security Research Engineer
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Solution Architect, UK
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Founders Office, UK
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Account Executive, UK
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Channel Sales, UK
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Head of Professional Services, UK
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Enterprise Sales Director, UK
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Workshop Controller
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