Senior/ DFT Engineer (Silicon Design)
Ethos Search Associates Pte Ltd • singapore, singapore • Posted June 18, 2026
About the Role
Key Responsibilities:
- Work closely with design team and make sure DFT structures are correctly inserted.
- Responsible for developing, implementing and verifying DFT schemes on hard-IPs in FPGAs.
- Responsible for developing and implementing techniques to test digital logic, using Scan Compression, Stuck-at, Transition and Path-Delay fault model
- Responsible for debugging of scan/mbist pattern issues on bench/ATE to root cause the problem
- Assist in Diagnosis and Yield enhancement through product lifecycle
- BS or MS in Electrical/Electronic/Computer Engineering with 2 or more experience as DFT engineer
- Experience in creating and implementing complex chip-level DFT architecture
- Experience in DFT implementation including Scan and Scan Compression at IP and SoC level
- Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression.
- Pr...