Principal Soc Design Verification Methodology Engineer

Eximietas Hiring Senior Design Verification Engineers/Leads Experience: 4 to 20+ Years. Locations: India: Bengaluru, Hyderabad, Pune & Ahmedabad. San Jose (Bay Area), USA Austin, USA Eligibility (USA): U.S. Permanent Residents (Green Card holders). Job Description: Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. Develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for both high-speed and low-speed peripherals (e.G., I2C, SPI, UART, GPIO, QSPI) as well as high-speed protocols (e.G., PCIe, Ethernet, CXL, MIPI, DDR, HBM ). Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF. Collaborate closely with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, to ensure alignment and seamless integration of verification efforts. Analyze and implement System Verilog assertions and functio...