Principal asic verification engineer

Responsibilities
We are seeking a Principal ASIC Design Verification Engineer to provide technical leadership and strategic direction across IP, Subsystem, and So C verification. This role is ideal for a verification architect and technical authority who drives methodology innovation, mentors teams, and champions AI-assisted verification to scale quality and productivity across complex ASIC platforms. You will focus on the following:
Act as a verification technical leader and architect across IP, Subsystem, and So C programs
Define and own end-to-end verification strategies, methodologies, and best practices across teams
Architect highly reusable, scalable, and modular UVM-based verification environments
Drive cross-project alignment on verification flows, coverage strategies, and sign-off criteria
Lead complex debug efforts, root-cause analysis, and final functional sign-off for critical programs
Champion AI-driven, data-driven, and automation-enabled verification...