Lead Application Engineer - Design Verification
Cadence Design Systems, Inc. • Yokohama, Japan • Posted June 13, 2026
About the Role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Responsibility:
1. Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution, AI solution, simulation Emulation and Acceleration products.
2. Plan, execute and manage key technical evaluations and benchmark with existing and potential customers.
3. Train, ramp-up and accompany customer project.
4. Conduct basic and advanced trainings, presentations and demos as necessary.
5. Providing technical expertise to address clients’ queries, which need expert involvement.
6. Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
Job Requirements:
4-6 or above years’ experience in the following areas:
1. Design experience in Verilog/VHDL for IP or SoC chip level.
2. ...
Job Responsibility:
1. Work closely with the Sales team to identify and scope opportunities for Cadence SoC Verification solution, AI solution, simulation Emulation and Acceleration products.
2. Plan, execute and manage key technical evaluations and benchmark with existing and potential customers.
3. Train, ramp-up and accompany customer project.
4. Conduct basic and advanced trainings, presentations and demos as necessary.
5. Providing technical expertise to address clients’ queries, which need expert involvement.
6. Aligned closely with corporate engineering and sales/marketing team on customer requirement for product direction/improvement.
Job Requirements:
4-6 or above years’ experience in the following areas:
1. Design experience in Verilog/VHDL for IP or SoC chip level.
2. ...