CPU Verification Engineer
Scaledge Technology • Bengaluru, Karnataka • Posted June 03, 2026
About the Role
Job Title: Senior Design Verification Engineer – IOMMU / Functional Safety
Location: Bangalore (BLR), India
Experience: 5–8 Years
Employment Type: Full-Time
About the Role
We are looking for a highly motivated Senior Design Verification Engineer with strong expertise in SystemVerilog and UVM to build and scale next-generation verification environments. This role offers the opportunity to work on cutting-edge IOMMU or Functional Safety (FuSa) domains, contributing to safety-critical silicon used in advanced compute systems.
Key Responsibilities
- Define comprehensive verification plans aligned with design specifications and architecture
- Develop and debug UVM-based testbenches from scratch
- Drive coverage closure (functional, code, and assertion coverage)
- Perform testcase development, regression management, and debugging of complex failures
- Collaborate with design, architecture, and firmware teams to ensure...
Location: Bangalore (BLR), India
Experience: 5–8 Years
Employment Type: Full-Time
About the Role
We are looking for a highly motivated Senior Design Verification Engineer with strong expertise in SystemVerilog and UVM to build and scale next-generation verification environments. This role offers the opportunity to work on cutting-edge IOMMU or Functional Safety (FuSa) domains, contributing to safety-critical silicon used in advanced compute systems.
Key Responsibilities
- Define comprehensive verification plans aligned with design specifications and architecture
- Develop and debug UVM-based testbenches from scratch
- Drive coverage closure (functional, code, and assertion coverage)
- Perform testcase development, regression management, and debugging of complex failures
- Collaborate with design, architecture, and firmware teams to ensure...