CAD Tools Optimisation Engineer: Design Verification

APPLE is seeking an experienced CAD engineer to join their team in Cambridge, focusing on automating chip design processes. The role involves optimizing the performance of simulation tools and requires a strong foundation in Linux with at least 5 years of RTL simulation experience. Ideal candidates will have knowledge of scripting languages and familiarity with the Cadence tool chain. APPLE values distinct perspectives, promoting an inclusive work environment.
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