Analog SerDes/PLL Circuit Design Engineer

MediaTek • Hsinchu City, Taiwan Province • Posted June 08, 2026

About the Role

Job DescriptionHigh speed analog SerDes/PLL circuit design
Work Location:HsinChu/ChuPei/Taipei/Tainan

#LI-DC3RequirementBe familiar with high speed analog SerDes circuit design, like CTLE, CDR, DFE, PLL and TX Driver